The present disclosure relates generally to the field of computing hardware, and more particularly to coupling dynamic random-access memory (DRAM) devices with embedded error-correcting code (ECC) with registers to log and correct memory errors.
Dynamic memory cells store charges in capacitors. These capacitors continue to shrink in size in order to accommodate increasing memory demand. As the capacitors get smaller, the dynamic memory cells become increasingly susceptible to single cell soft errors caused by reduced cell retention time, electrical or magnetic interference, and background radiation. To combat the increase in soft errors, some DRAM manufactures are embedding error-correcting code (ECC) directly on the DRAM device, instead of relying on the central processing unit (CPU) or system memory controller.
DRAM capacitors lose their charge over time and must be refreshed to avoid losing information. Many DRAM devices have a maximum time between refreshes in the milliseconds. The rate at which DRAM capacitors lose their charge may be temperature dependent. If a DRAM capacitor is cooled down significantly, the charges may persist longer than they do at normal operating temperatures, possibly lasting minutes to hours instead of the usual seconds.